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The Resource Reversible logic synthesis methodologies with application to quantum computing, Saleem Mohammed Ridha Taha

Reversible logic synthesis methodologies with application to quantum computing, Saleem Mohammed Ridha Taha

Label
Reversible logic synthesis methodologies with application to quantum computing
Title
Reversible logic synthesis methodologies with application to quantum computing
Statement of responsibility
Saleem Mohammed Ridha Taha
Creator
Subject
Language
eng
Summary
This book opens the door to a new interesting and ambitious world of reversible and quantum computing research. It presents the state of the art required to travel around that world safely. Top world universities, companies and government institutions are in a race of developing new methodologies, algorithms and circuits on reversible logic, quantum logic, reversible and quantum computing and nano-technologies. In this book, twelve reversible logic synthesis methodologies are presented for the first time in a single literature with some new proposals. Also, the sequential reversible logic circuitries are discussed for the first time in a book. Reversible logic plays an important role in quantum computing. Any progress in the domain of reversible logic can be directly applied to quantum logic. One of the goals of this book is to show the application of reversible logic in quantum computing. A new implementation of wavelet and multiwavelet transforms using quantum computing is performed for this purpose. Researchers in academia or industry and graduate students, who work in logic synthesis, quantum computing, nano-technology, and low power VLSI circuit design, will be interested in this book
Member of
http://library.link/vocab/creatorName
Ridha Taha, Saleem Mohammed,
Dewey number
004.1
Index
no index present
Literary form
non fiction
Nature of contents
dictionaries
Series statement
Studies in systems, decision and control
Series volume
volume 37
http://library.link/vocab/subjectName
  • Quantum computers
  • Reversible computing
  • Logic programming
Label
Reversible logic synthesis methodologies with application to quantum computing, Saleem Mohammed Ridha Taha
Instantiates
Publication
Copyright
Antecedent source
unknown
Bibliography note
Includes bibliographical references
Color
multicolored
Contents
  • Preface; Contents; Abbreviations; Symbols; 1 Introduction; 1.1 Background; 1.2 What This Book Is About; 1.3 Motivation; 1.4 Major Contributions of This Book; 1.5 Overview of the Book Chapters; 1.6 Overall Message of the Book; References; 2 Fundamentals of Reversible Logic; 2.1 Preliminaries; 2.2 Basic Definitions; 2.3 Reversible Logic Gates; 2.3.1 Feynman Gate; 2.3.2 Toffoli Gate; 2.3.3 Fredkin Gate; 2.4 Reversible Logic Synthesis; 2.5 Overview of Reversible Logic Synthesis Methods; 2.6 The Elimination of Garbage in Binary Reversible Circuits; References
  • 3 Methods of Reversible Logic Synthesis3.1 Reversible Expansions and Reversible Spectral Transforms; 3.1.1 Reversible Ternary Shannon and Davio Expansions; 3.1.2 Reversible Shannon Spectral Transforms; 3.1.3 Reversible Davio Spectral Transforms; 3.2 The Elimination of Garbage in Ternary Reversible Circuits; 3.3 Reversible Decision Trees (RDTs); 3.4 Reversible Decision Diagrams (RDDs); 3.5 Reversible Lattice Circuits; 3.5.1 Symmetric and Non-symmetric Functions; 3.5.2 Two-Dimensional Lattice Circuits; 3.5.3 Three-Dimensional Lattice Circuits
  • 3.5.4 Algorithms for Realizing the Shannon/Davio Expansions of Ternary Functions into 3D Lattice Circuits3.5.4.1 An Algorithm for the Shannon Expansion; 3.5.4.2 An Algorithm for the Davio0 Expansion; 3.5.4.3 New Algorithms for the Shannon/Davio Hybrid Expansions; 3.5.5 Complete Example for the Implementation of Ternary Functions Using 3D Lattice Circuits; 3.5.6 New Minimal Realization Method for 3D Lattice Circuits; 3.5.7 Lattice Circuit Synthesis Using ISID; 3.5.8 The Creation of Reversible Lattice Structures; 3.5.9 3D Ternary Davio Reversible Lattice Structures
  • 3.6 Reversible Fast Transform Circuits3.7 Group-Theoretic Representations; 3.8 Reversible Reconstructability Analysis Circuits; 3.8.1 Ternary MRA; 3.8.2 Reversible MRA (RMRA); 3.9 Reversible Programmable Gate Array (RPGA); 3.9.1 Definitions; 3.9.2 (2 * 2) Net Structures and RPGAs; 3.9.3 The New Reversible Gate (SALEEM); 3.9.4 Novel Design of RPGA Based on the SALEEM Reversible Gate; 3.10 Reversible Cascade Circuits; 3.11 Spectral-Based Synthesis Method; 3.12 Transformation-Based Network Synthesis of Fredkin-Toffoli Cascade Gates; 3.13 Heuristic Algorithm for Reversible Logic Synthesis
  • 3.14 Constructive Synthesis of Reversible Circuits by NOT and (n 2212 1)-CNOT Gates3.15 Summary; References; 4 Evaluation of the Reversible Logic Synthesis Methodologies; 4.1 NPN-Classification of Logic Functions; 4.2 New Evaluation Procedure of Reversible Synthesis Methods; 4.3 Comparison Between the Various Reversible Synthesis Methodologies; 4.4 Summary; References; 5 Reversible Sequential Logic Circuits; 5.1 Reversible Flip Flops; 5.1.1 Reversible RS Flip Flop; 5.1.2 Reversible Clocked RS Flip Flop; 5.1.3 Reversible D Flip Flop; 5.1.4 Reversible JK Flip Flop; 5.1.5 Reversible T Flip Flop
Control code
ocn922324123
Dimensions
unknown
Extent
1 online resource
File format
unknown
Form of item
online
Isbn
9783319234793
Level of compression
unknown
Quality assurance targets
not applicable
Reformatting quality
unknown
Sound
unknown sound
Specific material designation
remote
System control number
(OCoLC)922324123
Label
Reversible logic synthesis methodologies with application to quantum computing, Saleem Mohammed Ridha Taha
Publication
Copyright
Antecedent source
unknown
Bibliography note
Includes bibliographical references
Color
multicolored
Contents
  • Preface; Contents; Abbreviations; Symbols; 1 Introduction; 1.1 Background; 1.2 What This Book Is About; 1.3 Motivation; 1.4 Major Contributions of This Book; 1.5 Overview of the Book Chapters; 1.6 Overall Message of the Book; References; 2 Fundamentals of Reversible Logic; 2.1 Preliminaries; 2.2 Basic Definitions; 2.3 Reversible Logic Gates; 2.3.1 Feynman Gate; 2.3.2 Toffoli Gate; 2.3.3 Fredkin Gate; 2.4 Reversible Logic Synthesis; 2.5 Overview of Reversible Logic Synthesis Methods; 2.6 The Elimination of Garbage in Binary Reversible Circuits; References
  • 3 Methods of Reversible Logic Synthesis3.1 Reversible Expansions and Reversible Spectral Transforms; 3.1.1 Reversible Ternary Shannon and Davio Expansions; 3.1.2 Reversible Shannon Spectral Transforms; 3.1.3 Reversible Davio Spectral Transforms; 3.2 The Elimination of Garbage in Ternary Reversible Circuits; 3.3 Reversible Decision Trees (RDTs); 3.4 Reversible Decision Diagrams (RDDs); 3.5 Reversible Lattice Circuits; 3.5.1 Symmetric and Non-symmetric Functions; 3.5.2 Two-Dimensional Lattice Circuits; 3.5.3 Three-Dimensional Lattice Circuits
  • 3.5.4 Algorithms for Realizing the Shannon/Davio Expansions of Ternary Functions into 3D Lattice Circuits3.5.4.1 An Algorithm for the Shannon Expansion; 3.5.4.2 An Algorithm for the Davio0 Expansion; 3.5.4.3 New Algorithms for the Shannon/Davio Hybrid Expansions; 3.5.5 Complete Example for the Implementation of Ternary Functions Using 3D Lattice Circuits; 3.5.6 New Minimal Realization Method for 3D Lattice Circuits; 3.5.7 Lattice Circuit Synthesis Using ISID; 3.5.8 The Creation of Reversible Lattice Structures; 3.5.9 3D Ternary Davio Reversible Lattice Structures
  • 3.6 Reversible Fast Transform Circuits3.7 Group-Theoretic Representations; 3.8 Reversible Reconstructability Analysis Circuits; 3.8.1 Ternary MRA; 3.8.2 Reversible MRA (RMRA); 3.9 Reversible Programmable Gate Array (RPGA); 3.9.1 Definitions; 3.9.2 (2 * 2) Net Structures and RPGAs; 3.9.3 The New Reversible Gate (SALEEM); 3.9.4 Novel Design of RPGA Based on the SALEEM Reversible Gate; 3.10 Reversible Cascade Circuits; 3.11 Spectral-Based Synthesis Method; 3.12 Transformation-Based Network Synthesis of Fredkin-Toffoli Cascade Gates; 3.13 Heuristic Algorithm for Reversible Logic Synthesis
  • 3.14 Constructive Synthesis of Reversible Circuits by NOT and (n 2212 1)-CNOT Gates3.15 Summary; References; 4 Evaluation of the Reversible Logic Synthesis Methodologies; 4.1 NPN-Classification of Logic Functions; 4.2 New Evaluation Procedure of Reversible Synthesis Methods; 4.3 Comparison Between the Various Reversible Synthesis Methodologies; 4.4 Summary; References; 5 Reversible Sequential Logic Circuits; 5.1 Reversible Flip Flops; 5.1.1 Reversible RS Flip Flop; 5.1.2 Reversible Clocked RS Flip Flop; 5.1.3 Reversible D Flip Flop; 5.1.4 Reversible JK Flip Flop; 5.1.5 Reversible T Flip Flop
Control code
ocn922324123
Dimensions
unknown
Extent
1 online resource
File format
unknown
Form of item
online
Isbn
9783319234793
Level of compression
unknown
Quality assurance targets
not applicable
Reformatting quality
unknown
Sound
unknown sound
Specific material designation
remote
System control number
(OCoLC)922324123

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